ACCS India

1. Artificial Deadlock Detection in Process Networks- an SoC Perspective
Authors:	Bharath N, S.K. Nandy, Sainath N & Nagaraju B
Abstract:	In this paper an improved mechanism for early detection of artificial deadlocks and focus on implementation issues for SoC architectures like ECLIPSE and CAKE.
Access Full Text: (Members Only) (For Non ACCS members each paper is priced at Rs.100)

2. RPNG: A Tool for Random Process Network Generation
Authors:	Basant Kumar Dwivedi, Harsh Dhand, M. Balakrishnan & Anshul Kumar
Abstract:	This paper presents a user controllable pseudo random process network generator (RPNG). This can be used as test cases for tools related to application specific multiprocessor architectures.
Access Full Text: (Members Only) (For Non ACCS members each paper is priced at Rs.100)

3. Dynamic Reconfiguration in Motion Estimation
Authors:	Divya Krishna Murthy, Shen Li, Satoshi Goto, Tomoyashi Sato, Prakash S. Murthy, Vivek T.D
Abstract:	This paper proposes the use of a Dynamic Reconfigurable processor IPFLEX DAPDNA-2for motion estimation algorithm and architecture design.
Access Full Text: (Members Only) (For Non ACCS members each paper is priced at Rs.100)

4. Assertion-based Validation of Embedded Applications Targeted for Dynamically Reconfigurable Processor
Authors:	Pradeep G. & Ambar A. Gadkari
Abstract:	The paper presents an assertion-based methodology for design and validation of embedded system applications targeted for a dynamically reconfigurable processor platform, known as DAPDNA-2.
Access Full Text: (Members Only) (For Non ACCS members each paper is priced at Rs.100)

5. Architecture Oriented Architecture Oriented Performance Optimizations for Bus Based System-on-Chip Designs Using TLM.
Authors:	Amit Agarwal & Nitin Gupta
Abstract:	This paper discusses the way to utilize the analysis data in making design decisions for optimizing the architecture as well as the software application.
Access Full Text: (Members Only) (For Non ACCS members each paper is priced at Rs.100)

6. Energy Optimization for Software Prefetching in Embedded Applications
Authors:	Juan Chen, Yong Dong & Xue-jun Yang
Abstract:	This paper provides an analytical model to understand the memory/CPU frequency scaling characteristics of CPU- and memory-bound prefetching optimizations.
Access Full Text: (Members Only) (For Non ACCS members each paper is priced at Rs.100)

7. Genetic Algorithm Approach for System-on-Chip Wrapper/TAM Co-optimization using Rectangular Packing
Authors:	Goutam Das, K. Vidya Sagar, Santanu Chottopadhyay & H. Bhoumik
Abstract:	This paper presents a new approach for wrapper/TAM co-optimization based on generalized rectangle packing method.
Access Full Text: (Members Only) (For Non ACCS members each paper is priced at Rs.100)

8. Data Scaling of Two's Complement Data Representation for Low Power SoC Architectures
Authors:	Matthais Mueller, Sven Simon, Holger Gryska & Mario Steinert
Abstract:	This paper proposes data scaling for two's complement number representation which can be used in SoC architectures. If the proposed data scaling is applied, the number of switched capacitances is reduced which will reduce the total power dissipation.
Access Full Text: (Members Only) (For Non ACCS members each paper is priced at Rs.100)

9. Design of a 32-bit Smart Card SoC
Authors:	Amerendran N, Murugesh Rajiah & Vishwanatha Rao T
Abstract:	This paper describes the implementation of a 32-bit smart card SoC. The SoC is designed to operate at multiple voltage levels.
Access Full Text: (Members Only) (For Non ACCS members each paper is priced at Rs.100)

10. System on Chip Implementation of 2D DWT using Lifting Scheme
Authors:	G. Seetharaman, B. Venkataramani, V.Amudha & Anurag Saundattikar
Abstract:	This paper proposes a custom hardware block for the computation of 2D DWT Altera APEX 20K200 based SOC kit with Nios II soft-core processor.
Access Full Text: (Members Only) (For Non ACCS members each paper is priced at Rs.100)

FIRST PREV ( Page 1 of 3 ) NEXT LAST